1. Field of the Invention
The invention is related to a low voltage constant current source with a reference current source and multiple current output units, and more particularly, each output current is individually amplified by a desired ratio to the reference current, and is independent from other output units to avoid any interference.
2. Description of Related Arts
With reference to FIGS. 1A and 1B, two different types of conventional current mirrors composed of bipolar transistors (BJTs) are respectively shown, wherein NPN transistors constitute the current mirror shown in FIG. 1A, and PNP transistors constitute that of FIG. 1B. Basically, the circuit operations of the two current mirrors are similar. As shown in FIGS. 1A and 1B, because the bases of the two NPN transistors are connected together and emitters are both connected to ground, the junction voltage VBE1 and VBE2 are equal. In a condition that the two NPN transistors of FIG. 1A (or the PNP transistors in FIG. 1B) are matched, the input current I1 (reference current) is approximately equal to the output current I2, wherein a partial current (designated with IB) of the input current I1 is used to bias the two transistors. An approximate relationship between the two currents I1 and I2 is:
I2=I1xc3x97xcex2/(xcex2+2)
where xcex2 is called forward current gain, and the definition of which is xcex2=IC/IB.
The typical value of xcex2 approximately lies between tens and hundreds, such as 50-250, and is varied with the size, the operating temperature or other manufacturing factors of the transistor. Obviously, the relationship between the input current I1 and the output current I2 is varied with xcex2. When xcex2 value is getting smaller, IB is getting larger and the difference between I1 and I2 is accordingly increased.
For the current mirrors shown in FIGS. 1A and 1B, because the consumption of the input current I1 is large, such a current mirror is unsuitable to configure a multi-stage current mirror.
If the ratio between the transistors in FIG. 1A or 1B are not 1:1 but 1:N, the effect of current amplification is obtained, where the output current I2 is expressed the equation I2≈Nxc3x97I1. The precise equation is I2=I1xc3x97xcex2N/(xcex2+1+N). Therefore, when the value of N is getting closer to xcex2, the current amplifying ratio xcex2N/(xcex2+1+N) is rapidly reduced. Such unmatched transistors will cause an extreme restriction on the current amplification of a current mirror. Moreover, limited by the manufacturing process of the bipolar transistors, the current mirror composed of bipolar transistors is only capable of providing an integer current amplification ratio, for example, 1:5, 2:3 or 10:7.
With reference to FIGS. 2A and 2B, two current mirrors composed of CMOS transistor are respectively illustrated, wherein NMOS transistors constitute the current mirror of FIG. 2A and PMOS transistors are for FIG. 2B. The operation of the CMOS current mirror is similar to the BJTs as mentioned above. When the two NMOS transistors (or PMOS) are matched, i.e. the channel width (W) and channel length (L) ratio (W/L) of the two NMOS transistors are identical, since the junction voltages between gate and source of the two NMOS transistors are the same (VGS1=VGS2) and there is almost no current flowing into the gates of the NMOS transistors (IG≈0), the input current I1 is approximately equal to the output current I2. The error between the input and the output current is caused from that the output current I2 is influenced by the output voltage VDS2. Thus, when VDS2 is not equal to VGS2, a minor difference between I1 and I2 arises.
Since the channel width/length ratio (W/L) of the CMOS elements is programmable by properly controlling the design thereof, the non-integer current amplification ratio (I2 /I1) is easily achieved by the CMOS current mirror. Furthermore, since the influence on the output current I2 caused from the gate current is tiny, the CMOS current mirror is capable of providing a large current amplification ratio. However, the application of CMOS transistors is still limited by several factors, such as the low current driving ability, low transconductance (gm), low voltage endurance etc. Thus, when the CMOS current mirror is required to provide a high output current and a high voltage endurance, the CMOS transistors are usually manufactured to have a larger size than the BJT transistors, so the production cost is accordingly increased.
With reference to FIGS. 3A and 3B, two current mirrors with gain are respectively composed of NPN BJTs and PNP BJTs. Each current mirror further contains a gain transistor to provide a base current IB. The relationship between the input current I1 and the output current I2 is expressed by equation I2=I1xc3x97(xcex22+xcex2)/(xcex22+xcex2+2). Obviously, since the numerator and denominator of the equation both have xcex22, the constant 2 in the denominator is able to be omitted from the equation. The output current I2 then is independent from xcex2 and almost equal to the input current I1.
However, the current mirrors shown in FIGS. 3A and 3B still have some problems in some particular operating conditions. For example, if the output of the current mirror is connected with a load and the output transistor is operated in the forward active region, the current mirror still functions normally. However, if the output of the current mirror is floating (i.e. there is no load connected to the output) or the output transistor is operated in the saturation region, a large current will flow through the gain transistor to the output transistor. Such a large current has some additional problems, such as power consumption and heat generation. Moreover, each transistor with base connected to the gain transistor is influenced and the output current is greatly decreased.
With reference to FIGS. 4A and 4B, a NMOS transistor (or a PMOS transistor in FIG. 4B) is applied to replace the BJT gain transistors as shown in FIGS. 3A and 3B. Since the gate current of the NMOS transistor is almost zero, the input current I1 is independent. The base current for the two BJT transistors is completely supplied by the NMOS transistor (or the PMOS transistor). The advantage of such current mirrors is that the output current is independent of the xcex2 and operating temperature. Thus, if the current driving ability of the NMOS transistors is large enough, the current gain is able to be greatly increased.
However, the current mirrors shown in FIGS. 4A and 4B also suffer from the problems as mentioned of FIGS. 3A and 3B. When the output of the current mirror is floating, i.e. there is no load connected to the output, or the output transistor is operated in the saturation region, a large current will flow through the gain transistor to the output transistor.
Whether in FIGS. 3A and 3B or FIGS. 4A and 4B, since a gain transistor is additionally provided in the current mirror, an additional voltage is needed to bias the gain transistor. For example, the bias voltage for the current mirror in FIG. 3A is required to have VBE+VBE, and FIG. 4B requires VBE+VGS. Due to the additional bias voltage, the current mirror is unsuitable to be worked in the low operating voltage.
With reference to FIG. 5, a current mirror with multi current output units is mainly composed of BJTs and switching elements. Each switching element can be chosen from NMOS, PMOS or CMOS transmission gates. All the transmission gates must be identical and operated at the same bias voltage to ensure that each output unit is worked correctly. The transmission gate (the first one from the left) is always kept at conductive. Each output unit is equipped with a transmission gate, whereby each output current is independently determined by its own transmission gate.
If the possible floating problem occurring at each output unit is predictable or detectable, each transmission gate can be individually controlled to be opened or closed. Actually, even when there is no control circuit for controlling the open/close of each transmission gate, each transmission gate itself is still capable of restricting unusually large current, so each output unit is independent and will not influence each other.
If the amplification ratio is intended to be higher than one, each transmission gate and each output transistor must be simultaneously changed. For example, if the intended amplification ratio is 3, the size (W/L) of the transmission gate and the output transistor both must be increased to be three times greater than their original size. Thereby, each voltage level VTG across each transmission gate is the same.
However, since the base current IB is completely depended on the input current I1, the output current of the current mirror shown in FIG. 5 is easily interfered with by xcex2. To solve the problem, the gain transistors as shown in FIGS. 3 and 4 or the known Darlington Pair transistors can be employed. Moreover, since each transmission gate requires an operating voltage VTG, the current mirror is unsuitable to be worked in the low operating voltage.
With reference to FIG. 6, another conventional constant current source circuit mainly comprises two parts, a constant reference current circuit and a current mirror circuit, both respectively illustrated at the left and right sides and separated by the dotted line. The total amount of the current mirrors at the right side is usually designed to have 8 bits or 16 bits. The reference constant current source circuit consists of a band-gap voltage generator and a PMOS current mirror (all MOS elements are replaceable by corresponding BJT elements). Therefore, the influence on the reference current circuit caused by temperature variation is very small, i.e. the generated reference current is insensitive to the temperature. However, because the current mirror circuit employs an NPN gain transistor to provide base currents for all output transistors, the current mirror becomes very sensitive to the operating temperature. To solve this problem, the NPN gain transistor is replaced with an NMOS gain transistor or the Darlington Pair transistors.
Further, the circuit of FIG. 6 is difficult to be operated at the low voltage. For example, the total voltage value to activate the current mirror is VDSR+VBEG+VTG+VBER (as designated in FIG. 6). So if the circuit were intended to be operated at a low voltage lower than 3.3 volts, that would be a great challenge. Another problem of the circuit in FIG. 6 is that each output current (I1-IN) is easily interfered with by the activation of other transmission gates. The reason of said interference is that the bias voltage VBEG of the gain transistor is varied with the total base currents provided by the gain transistor itself. If the MOS transistor is employed as the gain transistor, the variation is more serious. Besides the varied bias voltage VBEG, the voltage VDSR is also affected. Therefore, each output current value (I1-IN) would be in inverse proportion to the total activated output transistors.
To overcome the problems of the conventional circuit of FIG. 6, the voltage VDSR must be kept at a constant value and independent of the output currents (I1-IN). Further, the voltages VBEG and VTG must be reduced, and the reference current IR should also be independent of the output currents (I1-IN), that means the reference current IR must be independent of the base current IB.
To overcome the mentioned shortcomings, a low voltage constant current source operated at a low voltage in accordance with the present invention obviates or mitigates the aforementioned problems.
The main objective of the present invention is to provide a low voltage constant current source with a reference current source and multiple current output units to respectively provide a reference current and multiple individual output currents. Each output current is individually amplified by a desired ratio to the reference current, and is independent from other output units to avoid any interference.
To achieve the objective, the low voltage constant current source comprises:
a reference current source;
multiple current output units;
a control circuit coupled between the reference current source and the multiple output units, wherein the control circuit at least includes an operational amplifier, a transistor and a transmission gate;
wherein the operational amplifier is used for comparing an output voltage VCER of the reference current source with a reference voltage, and based on the compared result to determine bias voltages of the reference current source and each current output unit.
The features and structure of the present invention will be more clearly understood when taken in conjunction with the accompanying figures.